/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#ifndef MBOX_PROC_H
#define MBOX_PROC_H

#include "lld_platform.h"

/** \brief  mailbox core id definition
 *
 * The processor id is used to identify the mailbox processor in the system.
 * The number is defined by software, Just make sure it is one-to-one mapping
 * to the master id (See mbox_proc_id_to_master_id for the conversion).
 */
#define MBOX_PROC_ID_CR52P0     (0U)
#define MBOX_PROC_ID_CR52P1     (1U)
#define MBOX_PROC_ID_CR52P2     (2U)
#define MBOX_PROC_ID_CR52P3     (3U)
#define MBOX_PROC_ID_CR52P4     (4U)
#define MBOX_PROC_ID_CR52P5     (5U)
#define MBOX_PROC_ID_CR52P6     (6U)
#define MBOX_PROC_ID_CR52P7     (7U)
#define MBOX_PROC_ID_CR5LP      (8U)
#define MBOX_PROC_ID_CR5SE      (9U)

#define MBOX_PROC_ID_NUM        (10U)

/** \brief  mailbox master id definition
 *
 * The master id is used to identify the mailbox master in the system.
 * The number is defined by hadrdware design.
 */
#define MBOX_MASTER_ID_CR52P0   (0U)
#define MBOX_MASTER_ID_CR52P1   (1U)
#define MBOX_MASTER_ID_CR52P2   (2U)
#define MBOX_MASTER_ID_CR52P3   (3U)
#define MBOX_MASTER_ID_CR52P4   (4U)
#define MBOX_MASTER_ID_CR52P5   (5U)
#define MBOX_MASTER_ID_CR52P6   (6U)
#define MBOX_MASTER_ID_CR52P7   (7U)
#define MBOX_MASTER_ID_CR5LP    (12U)
#define MBOX_MASTER_ID_CR5SE    (13U)

/**
 * @brief mailbox rproc id
 */
typedef enum {
    MBOX_RPROC_CR52P0 = (1U << MBOX_PROC_ID_CR52P0),  /* CR52P0 */
    MBOX_RPROC_CR52P1 = (1U << MBOX_PROC_ID_CR52P1),  /* CR52P1 */
    MBOX_RPROC_CR52P2 = (1U << MBOX_PROC_ID_CR52P2),  /* CR52P2 */
    MBOX_RPROC_CR52P3 = (1U << MBOX_PROC_ID_CR52P3),  /* CR52P3 */
    MBOX_RPROC_CR52P4 = (1U << MBOX_PROC_ID_CR52P4),  /* CR52P4 */
    MBOX_RPROC_CR52P5 = (1U << MBOX_PROC_ID_CR52P5),  /* CR52P5 */
    MBOX_RPROC_CR52P6 = (1U << MBOX_PROC_ID_CR52P6),  /* CR52P6 */
    MBOX_RPROC_CR52P7 = (1U << MBOX_PROC_ID_CR52P7),  /* CR52P7 */
    MBOX_RPROC_CR5LP  = (1U << MBOX_PROC_ID_CR5LP),   /* CR5LP */
    MBOX_RPROC_CR5SE  = (1U << MBOX_PROC_ID_CR5SE),   /* CR5SE */
} sdrv_mbox_rproc_id_t;

uint8_t mbox_proc_id_to_master_id(uint8_t proc_id);

#define MBOX_PROC_TO_MASTER_ID(i) mbox_proc_id_to_master_id(i)

#endif /* MBOX_PROC_H */
